The present disclosure relates to a semiconductor device and a sensing system including the semiconductor, and more particularly to a semiconductor device in which a high-quality signal can be obtained, and a sensing system including the semiconductor.
In proposing the technique of the present disclosure, a difference between the existing semiconductor device and sensing system, and a semiconductor device and a sensing system of the present disclosure will be described below. In the following, a description will be given by exemplifying an image processing sensing system.
FIG. 1 is a block diagram showing an example of a configuration of an existing image sensor 1. In the existing image sensor 1, a reference voltage generating portion 19 supplies a necessary reference voltage to each of individual portions. A driver 17 drives a pixel portion 11 in which plural pixels are disposed in a matrix, thereby reading out an analog video signal from the pixel portion 11. An Analog to Digital (AD) converter 12 compares the analog video signal inputted thereto from the pixel portion 11 with a reference voltage that is supplied from a Digital to Analog (DA) converter 18 so as to be gradually increased, and inverses an output signal thereof when a level of the analog video signal has reached the reference voltage.
A counter 13 counts a clock for a period of time until the output signal from the AD converter 12 is inverted from a predetermined timing on. As a result, the level of the analog video signal is converted into a digital video signal. A Static Random Access Memory (SRAM) 14 temporarily stores therein the digital video signal output from the counter 13.
A pipeline processing portion 15 subjects the digital video signal supplied thereto from the SRAM 14 to various kinds of processing. The pipeline processing portion 15 builds therein an SRAM 15A and the SRAM 15A temporarily stores therein the digital video signal that has been subjected to preprocessing. The digital video signal read out from the SRAM 15A is output to the outside through a data interface 16.
A Micro Processing Unit (MPU) 20 controls operations of the individual portions in accordance with a program and data stored in a One Time Programmable Read Only Memory (OTP) 21.
Heretofore, an image sensor has been known in which the pixel portion 11 described above and other circuit 31 are disposed on one sheet of substrate. In a word, the AD converter 12, the counter 13, the SRAM 14, the pipeline processing portion 15, the data interface 16, the driver 17, the DA converter 18, the reference voltage generating portion 19, the MPU 20, and the OTP 21 are disposed in the circuit portion 31.
For the purpose of balancing integration and noise characteristics, this applicant for letters patent previously proposes a technique, for example, described in Japanese Patent Laid-Open No. 2011-159958.
However, in the case of a structure in which the substrate of the pixel portion 11, and the substrate of the circuit portion 31 are laminated on top of each other in such a manner, the heat generated in the circuit portion 31 exerts a bad influence on the pixel portion 11, thereby deteriorating the video signal in some cases. As a result, it is necessary to provide a circuit for compensating for such a situation, which leads to an increase in cost in some cases. If the circuit for the compensation is omitted, then it becomes difficult to provide the high-quality image sensor.